The present invention relates to a digital-to-analog converter for converting discrete digital data into continuous analog signals. In this specification, it is assumed that a case where function values have finite values except zero in a local region and become zero in regions different from the region is called a xe2x80x9clocal support.xe2x80x9d
A recent digital audio apparatus, for example, a CD (Compact Disk) player, uses a D/A (digital-to-analog) converter to which an over-sampling technique is applied to obtain a continuous analog audio signal from discrete music data (digital data). Such a D/A converter generally uses a digital filter to raise a pseudo sampling frequency by interpolating input digital data, and outputs smooth analog audio signals by passing each interpolation value through a low-pass filter after generating a staircase signal waveform with each interpolation value held by the sample holding circuit.
A data interpolation system disclosed in WO99/38090 is well known as a method of interpolating data into discrete digital data. In this data interpolation system, differentiation can be performed only once in the whole range, and a sampling function is used such that two sampling points each before and after an interpolation position, that is, a total of four sampling points, can be considered. Since the sampling function has values of a local support unlike the sinc function defined by sin (xcfx80ft)/(xcfx80ft) where f indicates a sampling frequency, there is a merit that no truncation errors occur although only four pieces of digital data are used in the interpolating operation.
Generally, oversampling is performed by using a digital filter in which the waveform data of the above mentioned sampling function is set to a tap coefficient of an FIR (finite impulse response) filter.
If the oversampling technology of performing an interpolating operation for discrete digital datausing the above mentioned digital filter, a low pass filter having a moderate attenuation characteristic can be used. Therefore, the phase characteristic with a low pass filter can approach a linear phase characteristic, and the sampling aliasing noise can be reduced. These effects are more outstanding with a higher oversampling frequency. However, if the sampling frequency becomes higher, the performance of the digital filter and the sample hold circuit is also sped up. Therefore, it is necessary to use expensive parts appropriate for the quick performance, thereby increasing the cost of the required parts. In addition, when the sampling frequency is high (for example, several MHz) as in the case of image data, it is necessary to configure a digital filter or a sample hold circuit using parts operable at several tens MHz to several hundreds MHz, which cannot be easily realized.
Additionally, although the oversampling technology is used, a smooth analog signal is generated by passing a signal waveform in the form of steps through a low pass filter. Therefore, a desired linear phase characteristic cannot be realized so far as a low pass filter is used, and an output waveform is distorted.
The present invention has been achieved to solve the above mentioned problems, and aims at providing a digital-to-analog converter capable of obtaining an output waveform having less distortion without speeding up the operations of the parts.
In the digital-to-analog converter according to the present invention, a plurality of data holding unit hold plural pieces of digital data input at predetermined intervals, and a plurality of multiplying unit perform multiplying processes using respective multiplicators for the first half and the second half of the data holding period on the digital data held in the respective data holding unit. After stepwise voltage waveform generation unit have generated a stepwise analog voltage corresponding to the digital data obtained by adding unit adding up multiplication results, a plurality of integrating unit perform analog integration several times, and continuous analog signals smoothly connecting voltage values corresponding to sequentially input respective digital data are generated. Thus, the multiplication results corresponding to sequentially input plural pieces of digital data are added up, and then the addition result is converted into an analog voltage and integrated, thereby obtaining continuously changing analog signals. As a result, it is not necessary to use a low pass filter to obtain a final analog signal, a group delay characteristic is not deteriorated by different phase characteristics depending on the applicable signal frequencies, and therefore an output waveform can be obtained with less distortion. As compared with the conventional method used with oversampling, the cost of parts can be reduced because it is not necessary to speed up the operations of the parts and to use expensive parts.
Each of the multiplicators used in the multiplying processes by the plurality of multiplying unit is desired to correspond to each of the values of step functions obtained by differentiating plural times piecewise polynomials for a predetermined sampling function configured by the piecewise polynomials. That is, by integrating plural times the above mentioned step function, a waveform corresponding to the predetermined sampling function can be obtained. Therefore, a convolution operation using a sampling function can be equivalently realized by generating a step function. As a result, the contents of the entire process can be simplified, and the number of processes required converting digital data into analog signals can be successfully reduced.
In addition, the above mentioned step function is desired to equally set the positive and negative regions. Thus, the divergence of integration results of the integrating unit can be prevented.
Furthermore, it is desirable that the above mentioned sampling function has a value of local support with the whole range differentiable only once. It is assumed that a natural phenomenon can be approximated if the whole range is differentiable only once. By setting a smaller number of times of differentiation, the times of the analog integration performed by the integrating unit can be reduced, thereby successfully simplifying the configuration.
It is further desirable that the above mentioned step function contains an area of eight piecewise sections in equal width weighted by xe2x88x921, +3, +5, xe2x88x927, xe2x88x927, +5, +3, and xe2x88x921 in a predetermined range corresponding to five pieces of digital data arranged at equal intervals, and that every two of the eight weight coefficients are set as the multiplicators in the respective multiplying unit. Since simple weight coefficients represented by integers can be used as the multiplicators in each of the respective multiplying unit, the multiplying process can be simplified.
Especially, it is desirable that a multiplying process performed in each of the plurality of multiplying unit is represented by adding digital data to an operation result of the exponentiation of 2 by a bit shift. Since the multiplying process can be replaced with a bit shift process and an adding operation, the configuration can be simplified and the process can be sped up by simplifying the contents of the processes.
It is also desirable that the times of the analog integration is two, and an analog signal whose voltage level changes like a quadric function is output from the integrating unit. By interpolating an analog signal which changes like a quadric function into a voltage value corresponding to discrete digital data, a desired output waveform can be obtained without unnecessary high frequency components, etc.